Ney Laert Vilar Calazans - Personal Home Page

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Click here to access my Lattes CV (in Portuguese)

Professor at the PUCRS
CNPq Researcher - Level 2

    Faculty of Informatics (FACIN)
    Post-Graduate Program on Computer Science (PPGCC)
    Head of the GAPH - Hardware Design Support Group

    PhD in Microelectronics (DICE-UCL '93)
    MSc CS (CPGCC-UFRGS '88)
    BSEE (EE-UFRGS '85)

    IEEE, SBC and SBMICRO member  
 
 
 
 
 
 

Primary Research Interests

• Networks on Chip - NoCs
• Asynchronous Circuits
• Fast Prototyping of Digital Systems (with FPGAs)
• Computer Aided Design of Digital Systems
• Reconfigurable Systems
• Telecommunication Digital Systems

Secondary Research Interests

• Embedded Systems - Modeling and High-level Synthesis
• Hardware-Software Codesign
• Teaching of Digital Systems, Computer Organization and Architecture
• Hardware Formal Verification

Professional Data

• My Job Schedule (in Portuguese)
• Teaching Activities
• Research Activities - See also the GAPH Research Group homepage
• My Publications
• My Curriculum Vitae
• Some Interesting Sites
• Prof. Fernando Gehm Moraes homepage
• Prof. Moraes Schedule

News

• 12/09/2007 - Speech on Non-Synchronous Intra-chip Communication, pronounced on the context of Engineering Faculty Semana Acadêmica available. Click on the speech title to obtain it.

• 05/09/2007 - Course material arising from Prof. Fabiano Hessel replacement on 03-05/September/2007 available. Click here to obtain it.

Pointers

	PUCRS - FACULDADE DE INFORMÁTICA  AV. IPIRANGA, 6681 - PRÉDIO 32 Sala 718  CEP 90619-900 - PORTO ALEGRE  RS - BRAZIL		ney.calazans@pucrs.br
	+55 51 3320 3611 Ext 8718		+55 51 3320 3521

Personal Data

• Hobbies and the Like
• Other Interesting Sites
• Karin & Ney Family Page
• Know Me Better

All pages are always under construction!

This page was last updated on March 20th, 2009.

If you find problems in this page, please send an e-mail to ney.calazans@pucrs.br.
We will fix it in the shortest possible delay. Thanks for your help!