Published Articles in Journal

			Brazilian classification
17		A Robust Architectural Approach for Cryptographic Algorithms using GALS Pipelines SOARES, Rafael; CALAZANS, Ney; MORAES, Fernando Gehm; MAURINE, Philipe; TORRES, Lionel IEEE Design & Test of Computers, 2011. Approved for publication in the Asynchronous Design and Test issue of the journal, vol. 28, no. 5, pp. 62-71.	Qualis CC A2
16		Exploring NoC-Based MPSoC Design Space with Power Estimation Models OST, Luciano; GUINDANI, Guilherme; INDRUSIAK, Leandro; MAATTA, Sanna; MORAES, Fernando Gehm IEEE Design and Test of Computers, vol. 28, no. 2, pp. 16-28, March/April,2011	Qualis CC A2
15		CAFES: A Framework for Intrachip Application Modeling and Communication Architecture Design MARCON, César; CALAZANS, Ney; MORENO, Edson; MORAES, Fernando Gehm; HESSEL, Fabiano; SUSIN, Altamiro Journal of Parallel and Distributed Computing (Print), v. 71, no. 5, p. 714-728, 2011.	Qualis CC A2
14		A New Test Scheduling Algorithm Based on Networks-on-Chip as Test Access Mechanisms AMORY, Alexandre; LAZZARI, Cristiano; LUBASZEWSKI, Marcelo; MORAES, Fernando Gehm Journal of Parallel and Distributed Computing (Print), v. 71, no. 5, p. 675-686, 2011.	Qualis CC A2
13		Dynamic Task Mapping for MPSoCs CARVALHO, Ewerson; CALAZANS, Ney; MORAES, Fernando Gehm IEEE Design and Test of Computers, vol. 27, no. 5, pp. 26-35, Sep./Oct,2010	Qualis CC A2
12		Joint Validation of Application Models and Multi-Abstraction Network-on-Chip Platforms MAATTA, Sanna; MÖLLER, Leandro; INDRUSIAK, Leandro; OST, Luciano; GLESNER, Manfred; NURMI, Jari; MORAES, Fernando Gehm International Journal of Embedded and Real-Time Communication Systems (IJERTCS), v. 1, p. 86-101, 2010. paper
11		Secure Triple Track Logic Robustness Against Differential Power and Electromagnetic Analyses LOMME, V.; DEHBAOUI, A.; MAURINE, P.; TORRES, Lionel; ROBERT, Michel; SOARES, Rafael; CALAZANS, Ney; MORAES, Fernando Gehm Journal of Integrated Circuits And Systems, v. 4, n. 1, pp. 20-28, 2009. paper	Qualis CC B5 Eng IV B1
10		Buffer Sizing for Multimedia Flows in Packet-Switching NoCs TEDESCO, Leonel; CALAZANS, Ney; MORAES, Fernando Gehm Journal of Integrated Circuits And Systems, v. 3, n. 1, pp. 46-56, 2008. paper	Qualis CC B5 Eng IV B1
9		A New Router Architecture for High-Performance Intrachip Networks CARARA, Everton; CALAZANS, Ney; MORAES, Fernando Gehm Journal of Integrated Circuits And Systems, v. 3, n. 1, pp. 23-31, 2008. paper	Qualis CC B5 Eng IV B1
8		Comparison of network-on-chip mapping algorithms targeting low energy consumption MARCON, César; MORENO, Edson; CALAZANS, Ney; MORAES, Fernando Gehm Computers & Digital Techniques, IET, v. 2, no. 6, p. 471-482, 2008.	Qualis CC B1
7		Wrapper design for the reuse of a bus, network-on-chip, or other functional interconnect as test access mechanism AMORY, Alexandre; GOOSSENS, Kess; MARINISSEN, Erik; LUBASZEWSKI, Marcelo; MORAES, Fernando Gehm Computers & Digital Techniques, IET, v. 1, n. 3, p. 197-206, May, 2007.	Qualis CC B1
6		Design and Prototyping of an SDH-E1 Mapper Soft-core MARCON, César; PALMA, José; CALAZANS, Ney; MORAES, Fernando Gehm Revista da Sociedade Brasileira de Telecomunicações, Campinas, 2005. paper	Qualis CC B3
5		HERMES: an Infrastructure for Low Area Overhead Packet-switching Networks on Chip MORAES, Fernando Gehm; CALAZANS, Ney; MELLO, Aline; MÖLLER, Leandro; OST, Luciano The VLSI Journal, Amsterdam, v. 38, n. 1, p. 69-93, October, 2004.	Qualis CC B2
4		Core Communication Interface for FPGAs PALMA, José; MELLO, Aline; MÖLLER, Leandro; MORAES, Fernando Gehm; CALAZANS, Ney Journal of Integrated Circuits And Systems, v. 1, n. 1, p. 44-51, March 2004. paper	Qualis CC B5 Eng IV B1
3		Design and Prototyping of an E1 Drop_Insert Soft Core MORAES, Fernando Gehm; CALAZANS, Ney; MARCON, César; MESQUITA, Daniel; PALMA, José; BLAUTH, Vitor IEE Proceedings on Communications, Londres, v. 150, n. 4, p. 239-243, 2003.	Qualis CC B2
2		Integrating the Teaching of Computer Organization and Architecture with Digital Hardware Design Early in Undergraduate Courses CALAZANS, Ney; MORAES, Fernando Gehm IEEE Transactions on Education, Piscataway, v. 44, n. 2, p. 109-119, 2001. paper	Qualis CC B1
1		Projeto para Prototipação de um IP Soft Core MAC Ethernet CALAZANS, Ney; MORAES, Fernando Gehm; TOROK, Delfim; ANDREOLI, Andrey RITA Revista de Informatica Teórica e Aplicada, Porto Alegre, v. 8, n. 1, p. 23-41, 2001 paper	Qualis CC B3