LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
 
ENTITY des_bidirec_tb IS
END des_bidirec_tb;
 
ARCHITECTURE des_bidirec_tb OF des_bidirec_tb IS 
	signal clk, reset, loadKey,    Start_enc, Valid_enc, Ready_enc, Start_dec, Valid_dec, Ready_dec : std_logic:='0';
	signal Input_enc, Input_dec, Output_enc, Output_dec, plaintext, plaintext2, enctext, enctext2, Key : std_logic_vector(1 to 64);--:= (others=>'0'); 
	
BEGIN
	Key 		<= x"1234567890ABCDEF";
	plaintext 	<= x"4d616de365206d65"; -- "Mamãe me"
	plaintext2 	<= x"20416d6121212121"; -- " ama!!!!"
	enctext 	<= x"362982BB1B7A72C6"; -- "Mamãe me"
	enctext2 	<= x"AAB59A20A2B41684"; -- " ama!!!!"

    -- reset, clk and the key are the same for both, encrypt and decrypt modules
	reset <='1', '0' after 25 ns;

	process
	begin
		clk <= '1', '0' after 10 ns;
		wait for 20 ns;
	end process;

	process
	begin
		wait until ( reset = '0');
		wait until (clk = '1');
		Input_enc <= Key;	-- Set same key for both, encrypt and decrypt modules
		Input_dec <= Key;	-- Set same key for both, encrypt and decrypt modules
		wait until (clk = '1');
		wait until (clk = '1');
		loadKey <= '1';
		wait until (clk = '1');
		loadKey <= '0';
		wait until (Ready_enc='1' and Ready_dec='1'); 
		-- Up to here, program the encrypt and decrypt modules with a same crypt Key
		
		Input_enc <= plaintext;
		Input_dec <= enctext;
		start_enc <= '1';
		start_dec <= '1';

		wait until (clk = '1');
		wait until (clk = '1');
		wait until (clk = '1');
		wait until (clk = '1');
		wait until (clk = '1');
		wait until (clk = '1');
		
--		start_enc <= '0';         -- Disable encrypting for one clock
--		start_dec <= '0';         -- Disable decrypting for one clock
		wait until (clk = '1');   --
--		Input_enc <= plaintext2;  -- Prepare plaintext2 to be encrypted 
--		Input_dec <= enctext2;    -- Prepare enctext2 to be decrypted 
--		start_enc <= '1';         -- Start encrypting plaintext2
--		start_dec <= '1';         -- Start decrypting enctext2
		wait until (clk = '1');
		wait until (clk = '1');
		wait until (clk = '1');
		wait until (clk = '1');
		wait until (clk = '1');
		wait until (clk = '1');   
		                          
--		start_enc <= '0';         -- Disable encrypting/decrypting for one clock
--		start_dec <= '0';         -- Disable encrypting/decrypting for one clock
		wait until (clk = '1');   --
		wait until (clk = '1');
		wait until (clk = '1');
		wait until (clk = '1');
		wait until (clk = '1');
		wait until (clk = '1');
		wait until (clk = '1'); 
	end process;


	cipher: entity work.des(encrypt)
	port map(
			clk=>clk,
			rst=>reset,
			loadKey=>loadKey,
			start=>Start_enc,
			textin=>Input_enc,
			textout=>Output_enc,
			valid=>Valid_enc,
			ready=>Ready_enc
	);

	decipher: entity work.des(decrypt)
	port map(
			clk=>clk,
			rst=>reset,
			loadKey=>loadKey,
			start=>Start_dec,
			textin=>Input_dec,
			textout=>Output_dec,
			valid=>Valid_dec,
			ready=>Ready_dec
	);

END des_bidirec_tb;
