A Test for simulating the MIPS_S_withBRAMs executing a program that adds two integer vectors each with 11 elements, but with an additional test of the behavior for new signal hold_in (MIPS_S input) and hold_out (MIPS_S output status signal)

The files in this folder are the testbench and memory contents VHDL files prepared to simulate the somavet.asm program.

Use the soma_vet.wcfg waveform configuration for observing the most relevant signals to notice the program execution.

Vector V1 and V2 are added element by element and results are stored in vector V3.

The simulation should run for around 7,000ns. The testbench activates the hold_in input twice, one at 1155ns for 500ns and at 3495ns for 1000ns.