/*
   Pontificia Universidade Catolica do Rio Grande do Sul
   Projeto PISH
   Sub-projeto Prototipacao
   Responsavel: Prof. Ney Calazans

   Implementacao da arquitetura ARQ1 em Handel-C

   Autores: Cicero Zanoni
	    Eduardo Augusto Bezerra
	    Luciano Minuzzi

   Data da ultima alteracao: 14/08/96
   Alterado por: Eduardo Augusto Bezerra
*/

const spec harp1lram =      {       
       addr = {"P120", "P124", "P141", "P128", "P129", "P130", "P137",
	       "P132", "P133", "P134", "P135", "P136", "P138", "P142", "P126"},
       data = {"P2", "P1", "P151", "P152", "P153", "P154", "P155", "P156",
	       "P145", "P150", "P149", "P148", "P147", "P146", "P144", "P143"},
       ce   =  "P141",
       wb   = {"P127", "P125"},
       en   = {}
     };

const spec harp1hram =      {
       addr = {"P6", "P3", "P8", "P4", "P10", "P9", "P12",
	       "P11", "P14", "P13", "P21", "P15", "P18", "P17", "P23"},
       data = {"P31", "P27", "P30", "P24", "P25", "P26", "P29", "P28",
	       "P38", "P39", "P37", "P32", "P33", "P34", "P36", "P35"},
       ce   =  "P22",
       wb   = {"P5", "P7"},
       en   = {"P7", "P16"}     };

const spec harp1wram =      {
       addr = {"P6", "P3", "P8", "P4", "P10", "P9", "P12",
	       "P11", "P14", "P13", "P21", "P15", "P18", "P17", "P23"},       
       data = { "P2", "P1", "P151", "P152", "P153", "P154", "P155", "P156",
	       "P145", "P150", "P149", "P148", "P147", "P146", "P144", "P143",
	       "P31", "P27", "P30", "P24", "P25", "P26", "P29", "P28",
	       "P38", "P39", "P37", "P32", "P33", "P34", "P36", "P35"},
       ce   =  "P22",
       wb   = {"P5",  "P7"},
       en   = {"P7",  "P16"}     };

const spec harp2 = {  fpga_type       = "Xilinx3000", 
                      fpga_chip       = "3195APQ160-3",
                      clock_pad       = "P160",
                      not_error_pad   = "P55",
                      finish_pad      = "P44",
                      clock_divider   = "1",
                      carry_weight    = "50",
                      critical_weight = "100"};

const dw   = 8;       /* Tamanho da palavra em bits */
const opcw = 4;       /* Tamanho do op-code */
const oprw = 4;       /* Tamanho do operando */
const opme = 2;       /* Tamanho do modo de enderecamento */
const bit  = 1;

const rom_aw = 8;     /* Tamanho do barramento de enderecos da ROM */
const ram_aw = 8;     /* Tamanho do barramento de enderecos da RAM */

/* Conjunto de instrucoes da ARQ1 */
const NOT  = 0  : opcw;
const NOT1 = 1  : opcw;
const STA  = 2  : opcw;
const STA1 = 3  : opcw;
const LDA  = 4  : opcw;
const ADD  = 5  : opcw;
const OR   = 6  : opcw;
const AND  = 7  : opcw;
const JMP  = 8  : opcw;
const JC   = 9  : opcw;
const JN   = 10 : opcw;
const JZ   = 11 : opcw;
const JSR  = 12 : opcw;
const RTS  = 13 : opcw;
const HLT  = 14 : opcw;
const HLT1 = 15 : opcw;

/* Modos de enderecamento da ARQ1 */
const IME = 0  : opme;      /* Imediato */
const DIR = 1  : opme;      /* Direto */
const IND = 2  : opme;      /* Indireto */
const REL = 3  : opme;      /* Relativo */

const TRUE  = 1 : bit;
const FALSE = 0 : bit;

void main(target = harp2,
          eram MemPD[256]=harp1lram: dw, 
          chan (in)  cin  : dw, 
          chan (out) cout : dw)
{

    int AC : dw;                  /* Registrador Acumulador */
    int PC : rom_aw;              /* Contador de Programa */
    int RS : rom_aw;              /* Registrador de Subrotina */
    int C  : bit;                 /* Sinalizador: Vai-um */
    int N  : bit;                 /* Sinalizador: Negativo */
    int ZR : bit;                 /* Sinalizador: Zero */
    int RI : rom_aw;              /* Registrador de Instrucao (auxiliar) */
    int x,y: dw;                  /* Registrador auxiliar */
    int temp, temp1 : dw;         /* Regs. auxiliares para acesso a memoria */
    int cte: dw;

    int carry() = (0 @ AC) + (0 @ y);

    int opcode()  = RI \\ opcw; /* Retorna os opcw bits mais signif. de RI */

    int modoend() = (RI <- opcw) \\ opme;   /* Retorna os opme bits mais   */
					    /* signif. dos opcw menos      */
					    /* signif. de RI (Modo de End) */

    /* Inicializacao da RAM com o programa de teste */
    /*--------+------+---------+--------+------+--------------------*/
    /*        |Opc/ME|         | Oper.  | End. |       Mne Operando */
    /*--------+------+---------+--------+------+--------------------*/
    MemPD[0]  = 0x44; MemPD[1] = 12;    /* 00  | INIT: LDA END1     */
    MemPD[2]  = 0x58; MemPD[3] = 13;    /* 02  |       ADD END2,I   */
    MemPD[4]  = 0x24; MemPD[5] = 14;    /* 04  |       STA END3     */
    MemPD[6]  = 0x70; MemPD[7] = 0x0F;  /* 06  |       AND #0FH     */
    MemPD[8]  = 0xBC; MemPD[9] = 0x01;  /* 08  |       JZ  FIM,R    */
    MemPD[10] = 0x00;                   /* 0A  |       NOT          */
    MemPD[11] = 0xF0;                   /* 0B  | FIM:  HLT          */
    
    /* Inicializacao da RAM com os dados para o programa de teste */
    
    cin ? cte;
    MemPD[12] = cte;

    MemPD[13] = 15;

    cin ? cte;
    MemPD[15] = cte;

    cin ? cte;
    MemPD[14] = cte;


    do {
	RI = MemPD[PC];
	PC = PC + 1;
	case (opcode())
	{
	   NOT, NOT1 :
	   {   AC = ~AC;
	       N = AC \\ 7;
	   }

	   STA, STA1 :
	   {   x = MemPD[PC];
	       temp = x + PC;
	       temp1 = MemPD[x];
	       case(modoend())
	       {
		    /* IME : Nao existe para STA*/ 
		       DIR : MemPD[x] = AC;
		       IND : MemPD[temp1] = AC;
		       REL : MemPD[temp] = AC;
	       }
	       PC = PC + 1;
	   }

	   LDA :
	   {   x = MemPD[PC];  
	       temp = x + PC;
	       temp1 = MemPD[x];
	       case(modoend())
	       {
		       IME : AC = x;
		       DIR : AC = MemPD[x];
		       IND : AC = MemPD[temp1];
		       REL : AC = MemPD[temp]; 
	       }
	       if (AC == 0)
		   ZR = TRUE;
	       else
		   ZR = FALSE;
	       N = AC \\ 7;
	       PC = PC + 1;
	   }

	   ADD :
	   { 
	       x = MemPD[PC];  
	       temp = x + PC;
	       temp1 = MemPD[x];
	       case(modoend())
	       {
		   IME : { y  = x;
			   AC = carry() <- dw; 
			   C  = carry() \\ dw;
			 }
		   DIR : { y  = MemPD[x];
			   AC = carry() <- dw;
			   C  = carry() \\ dw;
			 }
		   IND : { y  = MemPD[temp1];
			   AC = carry() <- dw;
			   C  = carry() \\ dw;
			 }
		   REL : { y  = MemPD[temp];
			   AC = carry() <- dw;
			   C  = carry() \\ dw;
		         }
	       }
	       if (AC == 0)
		   ZR = TRUE;
	       else
		   ZR = FALSE;
	       N = AC \\ 7;
	       PC = PC + 1;
	   }

	   OR :
	   {
	       x = MemPD[PC];   
	       temp = x + PC;
	       temp1 = MemPD[x];
	       case(modoend())
	       {
		    IME : AC = AC | x;
		    DIR : AC = AC | MemPD[x];
		    IND : AC = AC | MemPD[temp1];
		    REL : AC = AC | MemPD[temp];
	       }
	       if (AC == 0)
		   ZR = TRUE;
	       else
		   ZR = FALSE;
	       N = AC \\ 7;
	       PC = PC + 1;
	   }

	   AND :
	   {
	       x = MemPD[PC];   
	       temp = x + PC;
	       temp1 = MemPD[x];
	       case(modoend())
	       {
		   IME : AC = AC & x;
		   DIR : AC = AC & MemPD[x];
		   IND : AC = AC & MemPD[temp1];
		   REL : AC = AC & MemPD[temp];
	       }
	       if (AC == 0)
		    ZR = TRUE;
	       else
		    ZR = FALSE;
	       N = AC \\ 7;
	       PC = PC + 1;
	   }

	   JMP :
	   {
	       x = MemPD[PC];  
	       case(modoend())
	       {
		   IME, DIR : PC = x;
		   IND      : PC = MemPD[x];
		   REL      : PC = PC + x;
	       }
	   }

	   JC :
	   {
	       x = MemPD[PC];  
	       if (C)
	       {
		    case(modoend())
		    {
		       IME, DIR : PC = x;
		       IND      : PC = MemPD[x];
		       REL      : PC = PC + x;
		    }
	       }
	       else
		    PC = PC + 1;
	   }

	   JN :
	   {
	       x = MemPD[PC];  
	       if (N)
	       {
		   case(modoend())
		   {
		       IME, DIR : PC = x;
		       IND      : PC = MemPD[x];
		       REL      : PC = PC + x;
		   }
	       }
	       else
		  PC = PC + 1;
	   }

	   JZ :
	   {
	       x = MemPD[PC];  
	       if (ZR)
	       {
		   case(modoend())
		   {
		       IME, DIR : PC = x;
		       IND      : PC = MemPD[x];
		       REL      : PC = PC + x;
		   }
	       }
	       else
		   PC = PC + 1;
	   }

	   JSR :
	   {
	       RS = PC;
	       x = MemPD[PC];   
	       case(modoend())
	       {
		     IME, DIR : PC = x;
		     IND      : PC = MemPD[x];
		     REL      : PC = PC + x;
	       }
	   }

	   RTS : PC = RS;

	   HLT, HLT1 : skip;

	   default   : stop;
	} cout ! AC;
    } while (opcode() != HLT);
}