--------------------------------------------------------------------
--
--	LPM_SHIFTREG Parameterized Megafunction
--
--	Copyright (C) 1988-1999 Altera Corporation
--	Any megafunction design, and related net list (encrypted or decrypted),
--	support information, device programming or simulation file, and any other
--	associated documentation or information provided by Altera or a partner
--	under Altera's Megafunction Partnership Program may be used only to
--	program PLD devices (but not masked PLD devices) from Altera.  Any other
--	use of such megafunction design, net list, support information, device
--	programming or simulation file, or any other related documentation or
--	information is prohibited for any other purpose, including, but not
--	limited to modification, reverse engineering, de-compiling, or use with
--	any other silicon devices, unless such use is explicitly licensed under
--	a separate agreement with Altera or a megafunction partner.  Title to
--	the intellectual property, including patents, copyrights, trademarks,
--	trade secrets, or maskworks, embodied in any such megafunction design,
--	net list, support information, device programming or simulation file, or
--	any other related documentation or information provided by Altera or a
--	megafunction partner, remains with Altera, the megafunction partner, or
--	their respective licensors.  No other licenses, including any licenses
--	needed under any third party's intellectual property, are provided herein.
--
--	Version 1.0
--
--------------------------------------------------------------------

INCLUDE "lpm_constant.inc";
INCLUDE "dffeea.inc";

PARAMETERS
(
	LPM_WIDTH,
	LPM_DIRECTION = "LEFT",
	LPM_AVALUE = 0,
	LPM_SVALUE = 0,
	DEVICE_FAMILY
);

INCLUDE "aglobal.inc";

SUBDESIGN lpm_shiftreg
(
	data[LPM_WIDTH-1..0]		: INPUT = GND;
	clock						: INPUT;
	enable						: INPUT = VCC;
	shiftin						: INPUT = VCC;
	load						: INPUT = GND;
	aclr, aset					: INPUT = GND;
	sclr, sset					: INPUT = GND;
	q[LPM_WIDTH-1..0]			: OUTPUT;
	shiftout					: OUTPUT;
)

VARIABLE
	IF (FAMILY_HAS_PRESET() == 0 & USED(aclr) & USED(aset)) GENERATE
		dffs[LPM_WIDTH-1..0]		: dffeea;
	ELSE GENERATE
		dffs[LPM_WIDTH-1..0]		: DFFE;
	END GENERATE;

	shift_node[LPM_WIDTH-1..0]	: NODE;
	IF (USED(LPM_AVALUE)) GENERATE
		ac	: lpm_constant with (LPM_WIDTH=LPM_WIDTH, LPM_CVALUE=LPM_AVALUE);
	END GENERATE;
	IF (USED(LPM_SVALUE)) GENERATE
		sc	: lpm_constant with (LPM_WIDTH=LPM_WIDTH, LPM_CVALUE=LPM_SVALUE);
	END GENERATE;

BEGIN

	ASSERT (LPM_WIDTH > 0)
			REPORT "Value of LPM_WIDTH parameter must be greater than 0"
			SEVERITY ERROR
			HELP_ID LPM_SHIFTREG_WIDTH;

	ASSERT (USED(aset) # USED(LPM_AVALUE) == 0)
			REPORT "Ignored LPM_AVALUE parameter because the aset port is not used"
			SEVERITY WARNING
			HELP_ID LPM_SHIFTREG_AVALUE;

	ASSERT (USED(sset) # USED(LPM_SVALUE) == 0)
			REPORT "Ignored LPM_SVALUE parameter because the sset port is not used"
			SEVERITY WARNING
			HELP_ID LPM_SHIFTREG_SVALUE;

	ASSERT (LPM_DIRECTION == "LEFT" # LPM_DIRECTION == "RIGHT")
			REPORT "Illegal value for LPM_DIRECTION parameter (%) -- value must be LEFT or RIGHT"
				LPM_DIRECTION
			SEVERITY ERROR
			HELP_ID LPM_SHIFTREG_DIRECTION;

	ASSERT (FAMILY_IS_KNOWN() == 1)
			REPORT "Megafunction lpm_shiftreg does not recognize the current device family (%) -- ensure that you are using the newest version of the megafunction"
				DEVICE_FAMILY
			SEVERITY WARNING
			HELP_ID LPM_SHIFTREG_FAMILY_UNKNOWN;

	% common ports %
	dffs[].ena = enable;
	dffs[].clk = clock;

	% Asynchronous control logic %
	IF (USED(LPM_AVALUE)) GENERATE
		dffs[].clrn = !aclr & (!aset # ac.result[]);
		dffs[].prn  = aclr # !aset # !ac.result[];
	ELSE GENERATE
		IF (USED(aclr)) GENERATE
			dffs[].clrn = !aclr;
		END GENERATE;
		IF (USED(aset)) GENERATE
			dffs[].prn = aclr # !aset;
		END GENERATE;
	END GENERATE;

	% Shift direction nodes %
	if (LPM_WIDTH > 1) GENERATE
		IF (LPM_DIRECTION == "LEFT") GENERATE
			shift_node[] = (dffs[LPM_WIDTH-2..0].q, shiftin);
			shiftout = dffs[LPM_WIDTH-1].q;
		ELSE GENERATE
			shift_node[] = (shiftin, dffs[LPM_WIDTH-1..1].q);
			shiftout = dffs[0].q;
		END GENERATE;
	ELSE GENERATE
		shift_node[] = shiftin;
		shiftout = dffs[0].q;
	END GENERATE;

	% Synchronous input logic %
	IF (USED(LPM_SVALUE)) GENERATE
		dffs[].d = !sclr & (  sset & sc.result[]
							# !sset & ( !load & shift_node[]
									  # load & data[]));
	ELSE GENERATE
		dffs[].d = !sclr & (sset # ( !load & shift_node[]
									# load & data[]));
	END GENERATE;

	% Connect outputs %
	q[] = dffs[].q;
END;