GAPH - R8 Processor Core

R8 Processor Core

Description

R8 is a simple, 16-bit, 40-instruction load-store processor core. It contains a 16x16-bit register file and presents several RISC-like features. All of its associated resources are freely available, including its specification, several implementations, software development tools and assembly language sample programs.

External Interface

Pin Orientation Description

ck In clock signal

rst In reset signal

dataIN In input data

dataOUT Out output data

address Out output address

ce Out chip enable

rw Out read/write enable

Download

Versions

Versions	Access	File	Description
Gold - 29/04/2003	Public	R8.vhd	VHDL source file of the R8 processor core

Tools

Tool	Version	Access	File	Description
R8 Assembler-Simulator	v1.7 - 20/06/2008	Public	R8_simulator_V1.7.zip	R8 Assembler/Simulator software package

Additional Files

Type	Description	Access	File
Document	R8 specification (in Portuguese and in English)	Public	R8_arq_spec_portugese.pdf R8_arq_spec_english.pdf
Testbench	VHDL testbench file to the R8 processor core	Public	R8_tb.vhd
Auxiliary	R8 assembly code sample	Public	vectaddR8.asm
Auxiliary	R8 object-code sample	Public	vectaddR8.txt
Auxiliary	Active-HDL simulator design project with R8 processor, testbench, and example program	Public	R8.zip
Auxiliary	Files containing a full-fledged hardware application, containing an instance of the R8 processor core, 1 Kword of memory, and a serial interface core to allow communication with a PC host (running hardware for the Xess XSV-800 hardware prototyping platform, using a Xilinx Virtex XCV800 FPGA)	Public	bar1p1m_v800.zip

Contact

Fernando Gehm Moraes / Ney Laert Vilar Calazans
E-mail: moraes,[email protected]

This page was last updated on June, 20th, 2008.

Pin	Orientation	Description
ck	In	clock signal
rst	In	reset signal
dataIN	In	input data
dataOUT	Out	output data
address	Out	output address
ce	Out	chip enable
rw	Out	read/write enable