• ASYNC 2016

  • The Symposium will occur in three different places along its 4-day duration. The Opening cocktail will be at the Sheraton Hotel (Address: Olavo Barreto Viana Street, 18 - Moinhos de Vento). The first two days of the Conference will be at Room 715 of Building 40 at the PUCRS Main Campus in Porto Alegre (Room 712 is reserved for the Coffee Breaks). The last day of ASYNC will be a joint day with the South School of Microelectronics (EMICRO), occuring at the Auditorium of the Faculty of Informatics on the ground floor of Building 32 at PUCRS.

    There will be a bus available to transfer ASYNC 2016 attendees from the Sheraton Hotel to PUCRS and back to Sheraton at the end of the woking day. The bus will leave the Sheraton 30min before the starting of the working day from Monday to Wednesday and will leave PUCRS 15-20min after the end of the working day.

    There will also be a bus available to transfer attendees from the Sheraton Hotel to the conference diner restaurant, PPKB and back to the Sheraton.

  • Sunday, 8 May 2016

  • 17:00 – 20:15    Registration & Welcome Cocktail at the Sheraton Hotel Porto Alegre (Brasília Room and Terrace)

  • Monday, 9 May 2016

  • 08:30 – 09:15    Registration
  • 09:15 – 9:45    Opening & Welcome   •   Ney L. V. Calazans,Peter A. Beerel, and Julian J. H. Pontes    [ Slides ]
  • 9:45 – 10:15    Coffee Break
  • 10:15 – 11:45    Session 1:Clocking, Delay Lines and Margins (Regular Track Papers only)
    • Chair: Mark Greenstreet
    • Asynchronously Controlled Frequency Locked Loop    [ Slides ]
      Suwen Yang, Frankie Liu and Vincent Lee
    • Analysis and Design of Delay Lines for Dynamic Voltage Scaling Applications    [ Slides ]
      Ramy Tadros, Weizhe Hua, Matheus Gibiluka, Matheus Moreira, Ney Calazans and Peter Beerel
    • Ring Oscillator Clocks and Margins (Best Paper Award Nominee)    [ Slides ]
      Jordi Cortadella, Marc Lupon, Alberto Moreno, Antoni Roca and Sachin Sapatnekar
  • 12:00 – 13:45    Lunch
  • 13:45 – 15:15    Session 2: Faults, Fault Avoidance and Resiliency (Regular and Industrial Track Papers)
    • Chair: Peter Beerel
    • Gradual Synchronization (Best Paper Award Nominee)     [ Slides ]
      Sandra Jackson and Rajit Manohar
    • Fault  Classification of the Error Detection Logic in the Blade Resilient Templates [ Slides ]
      Felipe Kuentzer and Alexandre Amory
    • Adding Conditionality to Resilient Bundled-Data Designs (Industrial Track Paper)    [ Slides ]
      Dylan Hand, Austin Katzin and William Koven
    • Finding Glitches Using Formal Methods (Industrial Track Paper)   [ Slides ]
      Yan Peng, Ian Jones and Mark Greenstreet
  • 15:15 – 15:45    Coffee Break
  • 15:45 – 17:15    Session 3: Metastability and Synchronization (Regular and Fresh Ideas Track Papers)
    • Chair: Ian Jones
    • Efficient Metastability-Containing Gray Code 2-Sort    [ Slides ]
      Christoph Lenzen and Moti Medina
    • The Metastable Behavior of a Schmitt-Trigger    [ Slides ]
      Andreas Steininger, Jürgen Maier and Robert Najvirt
    • Impact of Variations on Synchronizer Performance: An Experimental Study (Fresh Ideas Track Paper)  [ Slides ]
      Joycee Mekie, Prashansa Mukim and Kimaya Kale
    • Comparative Study of Synchronizer Circuits (Fresh Ideas Track Paper)  [ Slides ]
      Fathima Sinin and Joycee Mekie

  • Tuesday, 10 May 2016

  • 08:30 – 09:00    Registration
  • 09:00 – 10:00     Keynote 1: Patrick Groeneveld, Synopsys, Inc.     [ Slides ]
    Optimizing Automotive Drive Trains: from Energy Source to where the Rubber Meets the Road
    • Chair: Julian Pontes
  • 10:00 – 10:30    Coffee Break
  • 10:30 – 12:00    Session 4: Noise Control, GALS Systems and Yield (Regular, Industrial and Fresh Ideas Track Papers)
    • Chair: Andreas Steininger
    • GALS Partitioning Methodology for Substrate Noise Reduction in Mixed-Signal Integrated Circuits    [ Slides ]
      Milan Babic, Steffen Zeidler and Milos Krstic
    • Modeling and Analysis of Power Supply Noise Tolerance with Fine-grained GALS Adaptive Clocks (Best Paper Award Nominee)    [ Slides ]
      Divya Akella Kamakshi, Matthew Fojtik, Brucek Khailany, Sudhir Kudva, Yaping Zhou and Benton Calhoun
    • Automatic Clock: A Promising Approach Toward GALSification  (Industrial Track Paper)  [ Slides ]
      Mahdi Jelodari Mamaghani, Milos Krstic and Jim Garside
    • Test Margin and Yield in Bundled Data Design  (Fresh Ideas Track Paper)  [ Slides ]
      • Yang Zhang and Peter Beerel

12:00 – 13:45    Lunch

  • 13:45 – 15:00    Session 5: Asynchronous Applications and Security (Industrial and Fresh Ideas Track Papers)
    • Chair: Julian Pontes
    • Low Power QDI Asynchronous FFT  (Industrial Track Paper)  [ Slides ]
      Benjamin Tang and Frank Lane
    • An Asynchronous GFSK Demodulator for Automatic Meter Reading  (Fresh Ideas Track Paper)  [ Slides ]
      Yuxuan Liu, Guanghua Wu, Hong Chen and Anping He
    • Power-Gated Single-Track Asynchronous Circuits Using Three-Terminal MTJ-Based Nonvolatile Devices for Energy Harvesting Systems (Fresh Ideas Track Paper) 
      Tomohiro Yoneda, Naoya Onizawa, Masashi Imai and Takahiro Hanyu  (Fresh Ideas Track Paper)  [ Slides ]
    • Ultra Low Power and Low Cost Asynchronous Service Network Architecture for Adaptive Blocks Reconfiguration in an IoT Wireless Sensor Node Circuit  (Fresh Ideas Track Paper)  [ Slides ]
      Soundous Chairat, Edith Beigné, Ivan Miro-Panades, Florent Berthier and Marc Belleville
    • Can Asynchronous Circuits Tolerate Hardware Trojan Threat?  (Fresh Ideas Track Paper)  [ Slides ]
      Masashi Imai and Tomohiro Yoneda

15:00 – 15:45    Coffee Break & Demos

  • ASGTools: CAD tools for asynchronous design, synthesis, analysis and optimization
    • Norman Kluge, Ralf Wollowski and Cornelius Bock

  • 15:45 – 18:15    Panel: The Future of Asynchronous: Bundled-Data or QDI
    • Moderator: Peter Beerel
      • Panel Members: William Koven (REM), Ken Stevens (U Utah), Julian Pontes (ARM UK), Benjamin Tang (Qualcomm Research).
  • 19:30 – 22:30    Conference Dinner at the PPKB Restaurant
    Keynote 2:
     Paulo A. dal Fabro, Chipus Microelectronics.     [ Slides ]
    Starting and Growing a Semiconductor Business in Brazil
    • Chair: Ney Calazans

  • Wednesday, 11 May 2016

  • 08:00 – 08:30    Registration
  • 8:30 – 10:00    Session 6: New Methods for Asynchronous Controllers (Regular Track Papers only)
    • Chair: Tomohiro Yoneda
    • Qualifying Relative Timing Constraints for Asynchronous Circuits   [Slides]
      Jotham Vaddaboina Manoranjan and Kenneth S. Stevens
    • Optimising Bundled-Data Balsa Circuits    [ Slides ]
      Norman Kluge and Ralf Wollowski
    • Specification Mining for Asynchronous Controllers    [ Slides ]
      Javier De San Pedro, Thomas Bourgeat and Jordi Cortadella
  • 10:00 – 10:30    Coffee Break & Voting
  •  10:30 – 11:30    Closing Session
    • Chairs: Peter A. Beerel, Julian J. H. Pontes, and Ney L. V. Calazans